|
Html Tag |
<iframe src="https://ndatasheet.com/datasheet-frame/300/CY7C12431KV18" width="300" height="250" frameborder="0" marginwidth="0" marginheight="0" scrolling="no"></iframe> |
Datasheet Info |
36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7 |