|
Html Tag |
<iframe src="https://ndatasheet.com/datasheet-frame/300/ASM4SSTVF32852" width="300" height="250" frameborder="0" marginwidth="0" marginheight="0" scrolling="no"></iframe> |
Datasheet Info |
August 2004 rev 2.0 DDR 24-Bit to 48-Bit Registered Buffer ASM4SSTVF32852 Features Differential clock signals. Supports SSTL_2 class II spec |