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Html Tag |
<iframe src="https://ndatasheet.com/datasheet-frame/300/CY2PP3210" width="300" height="250" frameborder="0" marginwidth="0" marginheight="0" scrolling="no"></iframe> |
Datasheet Info |
www.DataSheet4U.com FastEdge™ Series CY2PP3210 Dual 1:5 Differential Clock/Data Fanout Buffer Features • Dual sets of five ECL/PECL differential |