|
Html Tag |
<iframe src="https://ndatasheet.com/datasheet-frame/300/XRT8001" width="300" height="250" frameborder="0" marginwidth="0" marginheight="0" scrolling="no"></iframe> |
Datasheet Info |
XRT8001 WAN Clock for T1 and E1 Systems October 2001-1 GENERAL DESCRIPTION The XRT8001 WAN Clock is a dual-phase-locked loop chip that generates two |