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Html Tag |
<iframe src="https://ndatasheet.com/datasheet-frame/300/CY7C1263V18" width="300" height="250" frameborder="0" marginwidth="0" marginheight="0" scrolling="no"></iframe> |
Datasheet Info |
CY7C1261V18, CY7C1276V18 CY7C1263V18, CY7C1265V18 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features ■ Separate in |